The semiconductor industry has continued to provide products with increased speed and memory while at the same time reducing the overall space requirements of the integrated circuits and electronics associated with these improved products. However, pressure still exists within the industry to reduce the size of circuits and space requirements of the electrical components on the printed circuit boards so that the overall size of the electronic device (such as a cellular telephone) is minimized. The industry has developed a "chip-scale" standard to define minimum space requirements for semiconductor components. A chip-scale circuit is one that has an area equal to or less than 1.2 times the area of the die used to make the device.
Semiconductor chip manufacturers have typically focused on reductions in size of memory modules and microprocessors. For example, large scale integrated circuits, such as microprocessors are typically tab-leaded, flip chip bumped or coated onto the printed circuit board. However, the smaller pin count components such as transistors, diodes and FETs are still connected using lead frame technology to the printed circuit board. The reduction in size of these smaller pin count semiconductor chips to chip-scale dimensions or near chip scale dimensions would further decrease the overall size of semiconductor circuit boards.
Various methods have been used to accomplish reductions in size, including "flip-chip" technologies. In a flip chip devise, the flip chip bonding is a technique of using solder balls to solder the chips face down on a substrate. An example of flip chip bump bonding is shown in U.S. Pat. No. 4,912,545.
A conductive epoxy has also been used to making a frontside connection from multiple die to a substrate. An example of this can be seen in U.S. Pat. No. 5,657,206 where the connection is made from the die front Oside to the substrate.